The present invention relates to the manufacture of substrates. More particularly, the invention provides a technique for manufacturing a silicon-on-silicon substrate assembly. The assembly includes two substrates that are bonded together for use in the fabrication of a substrate for semiconductor integrated circuits, for example. But it will be recognized that the invention has a wider range of applicability; it can also be applied to other substrates for multi-layered integrated circuit devices, three-dimensional packaging of integrated semiconductor devices, microelectromechanical systems ("MEMS"), sensors, actuators, solar cells, biological and biomedical devices, and the like.
Wafers for electronic device fabrication are often cut from an ingot, or boule, of material with an abrasive saw. The wafer often serves as both a mechanical substrate and a semiconductor material to form electronic devices in or on. One of the most common examples of this is cutting silicon wafers from a silicon ingot. The wafers are typically polished to a very fine surface finish after "lapping" the wafer to remove the mechanical damage left by the abrasive saw, and after "backlapping" the other side of the wafer to remove saw damage and to produce a wafer of the desired thickness. In some processes, devices are fabricated directly in or on the silicon wafer. In other processes, a layer of semiconductor material is grown, for example by epitaxy, on the wafer. The epitaxial layer may provide lower impurity concentrations, or be of a different semiconductor type than the wafer. The devices are formed in what is known as the "active" layer, which is typically only a micron or so thick.
Epitaxial layers have been used successfully on smaller wafers and for smaller devices. Unfortunately, epitaxial layers have some associated problems that critically affect wafer yield and device yield as the size of either the wafer or the device increases. Epitaxial layers that are grown on a substrate typically adopt the crystalline structure of the substrate. In most cases, the substrate is a single crystal of a particular orientation. The most favored crystallographic orientation for growing an epitaxial layer, however, may not be the most favored crystallographic orientation for forming semiconductor devices. Additionally, surface defects or contamination on the surface of the substrate can lead to "pipes", "spikes", and other types of defects in the epitaxial layer. Often, a single defect will ruin a particular circuit, or cell, on a substrate. As the size of the cells gets bigger and more complex, the chance that any particular cell will fail because of a defect in the epitaxy layer increases. The size of the cells generally increases, given a particular processing technology, as the device count increases, which usually indicates an increase in circuit complexity and functionality.
The size of silicon wafers also continues to increase. Many state-of-the-art semiconductor devices are fabricated on 8-inch silicon wafers. Twelve-inch wafers are available. The semiconductor fabrication industry is moving toward using wafers of this size, but, as with most changes in technology, must solve some problems first. One of the problems is that growing a high-quality epitaxial layer on a 12-inch wafer is very difficult. Some conventional processes do not have a sufficient yield of good wafers through the epitaxial growth process to make using a 12-inch wafer economically attractive. This problem is compounded by the cost of a 12-inch substrate, which can be quite high.
From the above, it is seen that a technique for providing a substitute for an epitaxial layer that is cost effective and efficient is desirable.